Fairino FR10: How do I untangle who sets and clears each signal?

GraceCarter1016 · 23 May 2026, 00:00 UTC

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GR
GraceCarter1016
Our application sometimes misses the PLC's brief request for sample verification. I'm reviewing that ordinary, non-safety handshake for Fairino FR10 in a sample-checking cell with separate safety controls, with a fixture-mounted bracket in the setup. Signal ownership and clearing conditions aren't clearly documented. The safety functions are independently engineered and separate from this job interface.

2 replies

RA
RaviAli0215
Replying to GraceCarter1016

Does your trace show when the PLC request is raised and cleared relative to application polls, including which side performs the clearing?

6 points
GR
GraceCarter1016
Replying to RaviAli0215

Our trace shows it rising and falling between two polls. The PLC clears it without an observed acknowledgement. No wonder the application misses it.

15 points

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